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How do you convert to unsigned in VHDL?

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Convert To Unsigned in VHDL

Quick Syntax

library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;

......

-- convert from natural integer to unsigned output1 <= to_unsigned(input_natural, output1'length);

-- convert from std_logic_vector to unsigned (either one works the same) output2 <= to_unsigned(input_slv);
-- which does the same as this in the library: output2 <= unsigned(input_slv);

Purpose

Because VHDL is a strict type language, often times you will need to go back and forth between types in a design. Luckily, there are some great functions out there already built into common libraries.

It's best to use the ieee.numeric_std on new designs, which gives you lots of ways to convert between types, as well as math functions.

Nand Land has a great write up on the different conversions of types here: https://www.nandland.com/vhdl/tips/tip-convert-numeric-std-logic-vector-to-integer.html

Best Practices

1. It's recommended to use the ieee.numeric_std library on new designs. There are many convenient conversion functions in that library, including to_unsigned which will convert a natural integer and a std_logic_vector to unsigned.

2. For older designs that use the ieee.std_logic_arith library there's no need to change anything. The conversion function in this library is conv_unsigned.
0 votes
by (500 points)

VHDL is a type sensitive language - converting ( a signed number or a non-number such as std_logic_vector ) to unsigned is achieved via casting.

signal some_signed_vector : signed ( 7 downto 0 ) ;
signal some_unsigned_vector : unsigned ( 7 downto 0 ) ;
some_unsigned_vector <= unsigned ( some_signed_vector ) ;
0 votes
by (500 points)

std_logic_vector to unsigned:
* data_u <= unsigned(data_slv);
bit_vector to unsigned:
* data_u <= unsigned(data_bv);

But you need to use a proper package (numeric_std, numeric_bit, std_logic_arith)

To convert from integer to unsigned:
* to_unsigned(data_int, size) - using either numeric_bit or numeric_std
* conv_unsigned(data_int, size) - using std_logic_arith

Note: It is better to use numeric_std instead std_logic_arith + std_logic_unsigned/signed because numeric_std - is the standard IEEE library and it include all that you need in signed/unsigned arithmetic while others are vendor specific extensions from Synopsys and Mentor Graphics.

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