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in VHDL by (200 points)

How do you do multiplication in VHDL?

2 Answers

0 votes
by (500 points)

There are 2 ways to do multiplication. The first one is the '*' operator. The second one is instantiation of a multiplier component that contains multiplication logic.

Example :

signal x : signed ( 5 downto 0 ) ;
signal y : signed ( 8 downto 0 ) ;
signal result : signed ( 14 downto 0 ) ;

result <= x * y ; -- First method.
instantiation_of_multiplier : multiplier -- Second method. port map
input_data_1 => x ,
input_data_2 => y ,

result => result
) ;
Note: Multiplication should always be regarded as an "expensive" operation and therefore should be avoided when possible. For example: multiplication by 2 can be done by simply shifting left - avoiding the need of actually using a multiplier.
0 votes
by (500 points)

This depends on the application. When I don't care how it will done by synthesis tools I just type a * b. In other situations, if I design the FPGA project I use DSP slices. If I design ASIC or this is FPGA prototyping I do it using device's fabric (logic).

In most of my experiences I need high performance. So in the last case, I use a pipelined parallel binary multiplier scheme.

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