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What is a VHDL compiler?

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VHDL isn't a programming language. In a programming language the complier mainly translates from a high level language to machine code. With VHDL the process is different and more complex.

This is what a VHDL compiler does :

1. Parse the VHDL and look for syntax as well as logic mistakes.
2. Synthesize the code to real logic.
3. Placing the logic blocks of the synthesized code of the target device.
4. Routing between the placed logic blocks.
5. Generating a programming file ( in case of FPGA design ) for the target device.

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by (500 points)

This is a software or tool to parse VHDL code, check syntax while parsing, translate to or build (depends on realization details) an internal representation based on parsed data and VHDL's library oriented struture, check compile errors in regards with VHDL standard. This internal representation is then passed to a simulation kernel.

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