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in VHDL by (200 points)

VHDL modulo? What is it and how do I use it?

2 Answers

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by (500 points)

In VHDL - Modulo ( "mod" ) is an operator that returns the reminder of the division of 2 numbers.

Example :

signal result_1 , result_2 , result_3 , result_4 : integer ;

result_1 = 9 mod 3 ; -- result will equal 0. result_2 = 9 mod 4 ; -- result will equal 1. result_3 = -9 mod 4 ; -- result will equal 1. result_4 = 9 mod -4 ; -- result will equal -1. result_4 = -9 mod -4 ; -- result will equal -1.
Note : VHDL also has the "rem" operator which is very similar in principal but yields different signs for the result.
0 votes
by (300 points)

The Modulo operator is used for finding the remainder of the division of two numbers. Modulo is calculated by the keyword 'mod' in VHDL, however, it should be noted that generally, the mod operator is not synthesizable. If the second operand is a power of 2 then it may be synthesized.

For example, the code line below finds the modulo when 7 is divided by 3:

7 mod 3

The syntax can be generalized: integer mod integer;
The result will also be of integer type.

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