Interested In VHDL Training? Click Here

0 votes
in VHDL by (240 points)

What is a sensitivity list and how do I use it in VHDL?

3 Answers

0 votes
by (1.8k points)

VHDL Sensitivity List

Quick Syntax

PROC_EXAMPLE : process (Hello, I'm the sensitivity list!)
begin
...code statements
end process;
If you notice in the code above, the sensitivity list is saying hello. :)

Purpose

Here's a fun fact that many may not know. The sensitivity list is just to let your simulator know which signals it should watch for changes. Your synthesis tool doesn't change its implementation based on it since it pays attention to your logic instead. However, it probably will take note and issue warnings that it found things missing from your sensitivity list.

Why should you be cautious with your sensitivity list? Because if you don't you'll end up with a simulation that doesn't match hardware, which means you'll end up with bugs when you go on to hardware. It's a terrible idea to be sloppy with the sensitivity list.

You should put all the signals in your sensitivity list that drive events in your code. For example, clocks, resets, and input signals. If your resets are synchronous (clocked), then you can leave them off of your sensitivity list since every time the clock changes, your simulation tool will check everything again.

However, I prefer to put resets in any way just in case someone in the future makes the reset asynchronous and forgets to update the sensitivity list.

Examples

PROC_EXAMPLE : process (clk, reset, input_en)
begin
if rising_edge(clk) then
if reset = '1' then
output_en <= '0';
else
output_en <= input_en;
end if;
end if;
end process;

Best Practices

1. Be a good coder and always include all signals that do something in the process in its sensitivity list.
0 votes
by (300 points)

A VHDL sensitivity list is a set of signals that when changed - causes the VHDL process that's sensitive to them to resume operation.

Example :

sensitive_to_x : process ( x ) is -- the process will resume when x changes
begin
y <= x;
end process;
0 votes
by (260 points)

It is a list of signals that a process is sensitive to. It is defined after the keyword process. This is the same as using a wait on statement. Any change in signals in the sensitivity list causes the process to resume. It is important to remeber that only static signals can be part of the list, the signals for which reading is allowed. Function calls are not permissible.

Want to improve your VHDL skills?

Click Here - Sign Up For VHDL Training

© 2022 by Hardware Coder. User contributions are licensed under cc by-sa 4.0 with attribution required. Attribution means a link to the question, answer, user, etc on this site.

This site is owned and operated by Hardware Coder in McKinney, Texas.

Send Us A Message
About Us

By using this site, you agree to the following:

Privacy Policy
Terms and Conditions
DMCA Policy
Earnings Disclaimer
Legal Disclaimer

...