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0 votes
in VHDL by (240 points)

Does case sensitivity exist in VHDL?

3 Answers

0 votes
by (1.8k points)

VHDL is not case sensitive.

With that said, there are a few common ways of using upper and lower case out there in VHDL. It's best to pick one and stick to it within your entire design files. For example, some people prefer to capitalize constants while keeping signals lower case. Others like to capitalize pin level signals at the top file while others do not. The language doesn't care either way.

If you are working with others in a work environment, then you and your team mates need to agree on proper coding guidelines to follow. Typically, companies will put out a coding guideline document that you can see what the preference is in your work group.

If there is no document like that, check out a reference design that is available within the work group and write down some notes based on what you see others have done commonly. Then you can check with your team and agree on the list, and then you can publish the guideline document for others to follow.

Most people prefer individual things to be either all lower case or all upper case. Some exceptions include the first letter being upper and the rest being lower. Many coders find it annoying if there is a mix throughout an individual item of upper and lower case, i.e. "ThISisMySiGNal". Please don't do that.

0 votes
by (260 points)

It's not. Upper case and lower case objects are treated as one.

Example :

signals some_signal : integer ;
signal some_other_signal : integer ;
signal result : integer ;

ReSULT <= SOME_SIGNAL + sOME_oTHer_SIGNal ; -- Although totally unrecommended - this is perfectly legal
Wise usage of upper and lower case naming of objects can help make the code more readable. For example - port names and generics should be upper case.
0 votes
by (300 points)

No, VHDL is NOT case sensitive. This means that signals with the name: 'siG' will be treated the same as a signal with the name 'sig'. Upper case letters are equivalent to lower case letters so more than one signal name containing the same letters regardless of capitalization will be considered as one signal.

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