There are constant numbers in the Verilog Standard that are specified as integer constants or as real constants. Integer constants may be defined as either a simple decimal value or based constant (an optional size constant, an apostrophe character (', ASCII 0x27) followed by a base format character, and the digits). Examples:
1, 10, 127, 16'habcd, 3'b001, 4'd9
The real constants represent floating point values and are defined in either decimal notation (for example, 14.72) or in scientific notation (for example, 39e8). I use it directly in expressions and equations where its meaning is clear, or if its not clear, I use it through local params.
On the other hand I prefer to understand these constants as literals, but localparams and parameters as constants. I use it for:
- setting arrays ranges (for buses, counters, memory width and depth, register's width etc, pipeline width and size),
- configuring module's architecture by using generate statements that include any homogenious structures (I can define a number of repeats), other module instances, IP-cores, specific implementation etc.
- as a named constant value for computations, FSM implementations and so on (also to avoiding magic numbers)